Don't know. As far as I know you have more experience with this than I have. The differences in the GPL sources are not shocking:
2Big:
- Code: Select all
#if defined(CONFIG_LACIE_2BIG)
/* --- Board ID --- */
/* This is displayed by both Uboot and Linux during the boot process */
/* N.B.: The name reported from U-Boot must match the exact name stored in the board's configuration */
#define DB_CUSTOMER_BOARD_NAME "DB-88F5182-LaCie"
/* --- I2C Devices --- */
#define DB_CUSTOMER_BOARD_I2D_DEV_LIST_CNT 2
#define DB_CUSTOMER_BOARD_I2D_DEV_LIST { 0x32, 0x50 }
/* --- Device CS --- */
/* {CS type, params, devType, devWidth}*/
#define DB_CUSTOMER_BOARD_DEVCS_LIST_CNT 1
#define DB_CUSTOMER_BOARD_DEVCS_LIST {3, 0x8fcfffff, BOARD_DEV_NOR_FLASH, 8} /* bootCs */
/* --- MPP/GPP mapping --- */
/* ---
--- Set MPPSel registers in order to map the MPP in the following way
---
MPP# | Description | ID | Purpose (values from MSB to LSP)
---------------------------------------------------------------------------------------------------------------
0 | GPP - Input | RAID_MODE 0 | Raid mode bit 0 (cf. MPP#2)
1 | GPP - Input | USB-CTL2 | Power ctrl on USB port 2: OK(1) or FAIL(0)
2 | GPP - Input | RAID_MODE 1 | Raid mode bit 1 BIG(00b), SAFE(11b)
3 | GPP - Input | BOARD_IDENT (0) | HW Board ID bit 0 (cf. MPP#12)
4 | GPP - Input | FAN-ON | FAN activity : Running (1) or OFF(0)
5 | GPP - Input | /FAN-FAIL | FAN status : OK(1) or FAIL(0)
6 | GPP - Output | LED_FAIL | Front LED Red : ON(1) or OFF(0)
7 | GPP - Output | PWRON_BLINKING | Control initial Red/Blue HW blinking STOP(1), CONTINUE(0)
8-9 | GPP - Input/INTR | SW_ON & SW_OFF | Power switch : ON(01b), AUTO(00b) or OFF(10b)
10 | GPP - Output | FAIL_HD1 | Red LED for HD1 : ON(1), OFF(0)
11 | GPP - Output | FAIL_HD0 | Red LED for HD0 : ON(1), OFF(0)
12 | GPP - Input | BOARD_IDENT (1) | HW Board ID bit 1 (00b)
13 | GPP - Output | CDE_LED_HD1 | HD 1 LED blink Ctrl: ON(0) or OFF(1) -> linked to status of SATA 1 activity
14 | SATA 0 active | ACT_HD0 | HD 0 activity (Active low)
15 | SATA 1 active | ACT_HD1 | HD 1 activity (Active low)
16 | GPP - Output | CDE_LED | Front LED Blue Ctrl: ON(1) or OFF(0)
17 | GPP - Output | CDE_LED_HD0 | HD 0 LED blink Ctrl: ON(0) or OFF(1) -> linked to status of SATA 1 activity
18 | GPP - Input/INTR | PB | Front button: PUSHED(1) or RELEASED(0)
19 | GPP - Output | REQ_PWR_HD0 | HD (0 & 1) power command : ON(1) or OFF(0)
20-21 | Clock PCI | clock PCI | N/A
22 | GPP - Input | USB-CTL1 | Power ctrl on USB port 1: OK(1) or FAIL(0)
23 | GPP - Input | PWR_HD0 | Power state of HD0 : ON(1), OFF(0)
24 | GPP - Output | SHUTDOWN_REQ | HW Power control: DISABLE(0) or ENABLE(1)
25 | GPP - Input | PWR_HD1 | Power state of HD1 : ON(1), OFF(0)
---
-----------------------------------------------------------------------
---
*/
#define DB_CUSTOMER_BOARD_MPP0_7 0x00000003 /*| */
#define DB_CUSTOMER_BOARD_MPP8_15 0x55000000 /*|-> MPP/GPP mapping */
#define DB_CUSTOMER_BOARD_MPP16_23 0x00005555 /*| */
#define DB_CUSTOMER_BOARD_MPP_DEV N_A
#define DB_CUSTOMER_BOARD_GPP_OE 0x02F4133F /* Bit mask for GPP direction (1-In, 0-Out) */
/* GPP#: 22 2222 1111 1111 11 */
/* --54 3210 9876 5432 1098 7654 3210 */
/* MASK: 0010 1111 0100 0001 0011 0011 1111 */
/* HEX: 2 F 4 1 3 3 F */
#define DB_CUSTOMER_BOARD_GPP_VAL 0x00090080 /* Bit mask for the value Output GPP */
/* GPP#: 22 2222 1111 1111 11 */
/* --54 3210 9876 5432 1098 7654 3210 */
/* MASK: 0000 0000 1001 0000 0000 1000 0000 */
/* HEX: 0 0 9 0 0 8 0 */
//#define DB_CUSTOMER_BOARD_GPP_VAL 0x00080000 /* Bit mask for the value Output GPP */
/* GPP#: 22 2222 1111 1111 11 */
/* --54 3210 9876 5432 1098 7654 3210 */
/* MASK: 1110 1111 0100 0001 0011 0011 1111 */
/* MASK: 0001 0000 1000 0000 0000 0000 0000 */
/* HEX: 0 0 8 0 0 0 0 */
#define DB_CUSTOMER_BOARD_GPP_POL N_A
#define LACIE_BOARD_MPP8_15_SATA0_MASK 0x0F000000
#define LACIE_BOARD_MPP8_15_SATA1_MASK 0xF0000000
#define LACIE_BOARD_MPP8_15_SATA_MASK (LACIE_BOARD_MPP8_15_SATA0_MASK | LACIE_BOARD_MPP8_15_SATA1_MASK)
#define LACIE_BOARD_MPP8_15_SATA0 0x05000000
#define LACIE_BOARD_MPP8_15_SATA1 0x50000000
#define LACIE_BOARD_MPP8_15_SATA (LACIE_BOARD_MPP8_15_SATA0 | LACIE_BOARD_MPP8_15_SATA1)
#define LACIE_BOARD_MPP8_15_NO_SATA0 0x00000000
#define LACIE_BOARD_MPP8_15_NO_SATA1 0x00000000
#define LACIE_BOARD_MPP8_15_NO_SATA 0x00000000
/* --- GPP IN devices map --- */
#define LACIE_HW_BOARD_ID_GPP (MV_GPP3 | MV_GPP12)
#define LACIE_FAN_ACTIVITY_GPP MV_GPP4
#define LACIE_FAN_STATUS_GPP MV_GPP5
#define LACIE_POWER_SWITCH_ON_GPP MV_GPP8
#define LACIE_POWER_SWITCH_OFF_GPP MV_GPP9
#define LACIE_POWER_SWITCH_GPP (LACIE_POWER_SWITCH_ON_GPP | LACIE_POWER_SWITCH_OFF_GPP)
#define LACIE_PUSH_BUTTON_GPP MV_GPP18
#define LACIE_USB_POWER_STATUS_GPP (MV_GPP1 | MV_GPP22)
/* --- GPP OUT devices map --- */
#define LACIE_HDD_POWER_CTRL_GPP MV_GPP19
#define LACIE_HDD_POWER_STATUS_GPP (MV_GPP23 | MV_GPP25)
#define LACIE_FRONT_RED_LED_CTRL_GPP MV_GPP6
#define LACIE_HD0_ACTIVITY_CTRL_GPP MV_GPP14
#define LACIE_HD1_ACTIVITY_CTRL_GPP MV_GPP15
#define LACIE_FRONT_LED_BLINK_CTRL_GPP MV_GPP7
#define LACIE_FRONT_LED_CTRL_GPP MV_GPP16
#define LACIE_MAIN_POWER_CTRL_GPP MV_GPP24
#define LACIE_HD0_LED_CTRL_GPP MV_GPP17
#define LACIE_HD1_LED_CTRL_GPP MV_GPP13
#define LACIE_HD0_RED_LED_CTRL_GPP MV_GPP11
#define LACIE_HD1_RED_LED_CTRL_GPP MV_GPP10
#define LACIE_SEL_RAID_MODE_GPP (MV_GPP0 | MV_GPP2)
#define LACIE_HDD_ACTIVITY_CTRL_GPP (LACIE_HD0_ACTIVITY_CTRL_GPP | LACIE_HD1_ACTIVITY_CTRL_GPP)
#define LACIE_HDD_LED_CTRL_GPP (LACIE_HD0_LED_CTRL_GPP | LACIE_HD1_LED_CTRL_GPP)
#define LACIE_HDD_RED_LED_CTRL_GPP (LACIE_HD0_RED_LED_CTRL_GPP | LACIE_HD1_RED_LED_CTRL_GPP)
/* --- GPP mapped to interrupt mask --- */
/* N.B.: Select MPP pins that are supposed to operate as interrupt lines */
#define LACIE_POWER_SWITCH_ON_IRQ IRQ_GPP_8
#define LACIE_POWER_SWITCH_OFF_IRQ IRQ_GPP_9
#define LACIE_PUSH_BUTTON_IRQ IRQ_GPP_18
#define DB_CUSTOMER_BOARD_GPP_INTS_MASK ( LACIE_POWER_SWITCH_ON_GPP \
| LACIE_POWER_SWITCH_OFF_GPP \
| LACIE_PUSH_BUTTON_GPP \
)
/* --- GPP Info for devices linked to GPIO --- */
#define DB_CUSTOMER_BOARD_GPP_INFO_LIST_CNT 0x2
#define DB_CUSTOMER_BOARD_GPP_INFO_LIST {BOARD_DEV_USB_VBUS, 22} /* USB-CTL 1 on GPP22 */ \
,{BOARD_DEV_USB_VBUS, 1} /* USB-CTL 2 on GPP1 */
#else
#error "#### THIS BOARD DEFINITION SHOULD NOT HAVE BEEN LOADED - Please fix me ####"
#endif /* defined(CONFIG_LACIE_2BIG) */
5Big:
- Code: Select all
#if defined(CONFIG_LACIE_5BIG)
/* --- Board ID --- */
/* This is displayed by both Uboot and Linux during the boot process */
/* N.B.: The name reported from U-Boot must match the exact name stored in the board's configuration */
#define DB_CUSTOMER_BOARD_NAME "DB-88F5281-LaCie"
/* --- I2C Devices --- */
#define DB_CUSTOMER_BOARD_I2D_DEV_LIST_CNT 2
#define DB_CUSTOMER_BOARD_I2D_DEV_LIST { 0x32, 0x50 }
/* --- Device CS --- */
/* {CS type, params, devType, devWidth}*/
#define DB_CUSTOMER_BOARD_DEVCS_LIST_CNT 1
#define DB_CUSTOMER_BOARD_DEVCS_LIST {3, 0x8fcfffff, BOARD_DEV_NOR_FLASH, 8} /* bootCs */
/* --- MPP/GPP mapping --- */
/* ---
--- Set MPPSel registers in order to map the MPP in the following way
---
MPP# | Description | ID | Purpose (values from MSB to LSP)
---------------------------------------------------------------------------------------------------------------
0 | GPP - Output | SHUTDOWN_REG |req cpu power off
1 | GPP - Input | USB-CTL1 | Power ctrl on USB port 1: OK(1) or FAIL(0)
2 | GPP - Input | REQ_PWR_HDD0 |req power on/off hdd's(1 active)
3 | GPP - Input | BOARD_IDENT (0) | HW Board ID bit 0 (cf. MPP#12)
4 | GPP - Input | PB | front eye button (1 active)
5 | GPP - Output | CDE_LED | cmd front blue led '0' led off (slow
| | | blink by cpu) '1' led on
6 | GPP - Output | LED_FAIL | Front LED Red : 1 active
7 | GPP - Output | PWRON_BLINKING | Control initial Red/Blue HW blinking STOP(1), CONTINUE(0)
8-9 | GPP - Input/INTR | SW_ON & SW_OFF | Power switch : ON(01b), AUTO(00b) or OFF(10b)
10 | GPP - Output | FAIL_HD1 | Red LED for HD1 : ON(1), OFF(0)
11 | GPP - Output | FAIL_HD0 | Red LED for HD0 : ON(1), OFF(0)
12 | GPP - Input | BOARD_IDENT (1) | HW Board ID bit 1 (00b)
13 | GPP - Output | FAIL_HD2 | Red LED for HD2 : ON(1), OFF(0)
14 | GPP - Output | FAIL_HD3 | Red LED for HD3 : ON(1), OFF(0)
15 | GPP - Output | FAIL_HD4 | Red LED for HD4 : ON(1), OFF(0)
16 | GPP - Output | FAN_TEST | Force ctn trip point active
17 | GPP - Input | FAN_ON | Fan driving detection
18 | GPP - Input | FAN-FAI | Fan rotation failing detection
20 | PCI-INT0 | PCI interrupT | N/A
-----------------------------------------------------------------------
---
*/
#define DB_CUSTOMER_BOARD_MPP0_7 0x00000003 /*| */
#define DB_CUSTOMER_BOARD_MPP8_15 0x00000000 /*|-> MPP/GPP mapping */
#define DB_CUSTOMER_BOARD_MPP16_23 0x00000000 /*| */
#define DB_CUSTOMER_BOARD_MPP_DEV 0x00160000
#define DB_CUSTOMER_BOARD_GPP_OE 0xfffe131a /* Bit mask for GPP direction (1-In, 0-Out) */
#define DB_CUSTOMER_BOARD_GPP_VAL 0xe4 /* Bit mask for the value Output GPP */
#define DB_CUSTOMER_BOARD_GPP_POL N_A
/* --- GPP IN devices map --- */
#define LACIE_HW_BOARD_ID_GPP (MV_GPP3 | MV_GPP12)
#define LACIE_FAN_ACTIVITY_GPP MV_GPP17
#define LACIE_FAN_STATUS_GPP MV_GPP16
#define LACIE_POWER_SWITCH_ON_GPP MV_GPP8
#define LACIE_POWER_SWITCH_OFF_GPP MV_GPP9
#define LACIE_POWER_SWITCH_GPP (LACIE_POWER_SWITCH_ON_GPP | LACIE_POWER_SWITCH_OFF_GPP)
#define LACIE_PUSH_BUTTON_GPP MV_GPP4
#define LACIE_USB_POWER_STATUS_GPP MV_GPP1
/* --- GPP OUT devices map --- */
#define LACIE_HDD_POWER_CTRL_GPP MV_GPP2
#if 0
#define LACIE_HDD_POWER_STATUS_GPP (MV_GPP23 | MV_GPP25)
#endif
/* only for conformity .... the gpps for hdd are failure signal*/
#define LACIE_FRONT_RED_LED_CTRL_GPP MV_GPP6
#if 0
/* for hdd led, we control only the red, activity control is too complicated
* and must be implemented throught sata controller
*/
#define LACIE_HD0_ACTIVITY_CTRL_GPP MV_GPP11
#define LACIE_HD1_ACTIVITY_CTRL_GPP MV_GPP10
#define LACIE_HD2_ACTIVITY_CTRL_GPP MV_GPP13
#define LACIE_HD3_ACTIVITY_CTRL_GPP MV_GPP14
#define LACIE_HD4_ACTIVITY_CTRL_GPP MV_GPP15
#endif
#define LACIE_FRONT_LED_BLINK_CTRL_GPP MV_GPP7
#define LACIE_FRONT_LED_CTRL_GPP MV_GPP5
#define LACIE_MAIN_POWER_CTRL_GPP MV_GPP0
#define LACIE_HD0_RED_LED_CTRL_GPP MV_GPP11
#define LACIE_HD1_RED_LED_CTRL_GPP MV_GPP10
#define LACIE_HD2_RED_LED_CTRL_GPP MV_GPP13
#define LACIE_HD3_RED_LED_CTRL_GPP MV_GPP14
#define LACIE_HD4_RED_LED_CTRL_GPP MV_GPP15
/* --- GPP mapped to interrupt mask --- */
/* N.B.: Select MPP pins that are supposed to operate as interrupt lines */
#define LACIE_POWER_SWITCH_ON_IRQ IRQ_GPP_8
#define LACIE_POWER_SWITCH_OFF_IRQ IRQ_GPP_9
#define LACIE_PUSH_BUTTON_IRQ IRQ_GPP_4
#define DB_CUSTOMER_BOARD_GPP_INTS_MASK ( LACIE_POWER_SWITCH_ON_GPP \
| LACIE_POWER_SWITCH_OFF_GPP \
| LACIE_PUSH_BUTTON_GPP \
)
/* --- GPP Info for devices linked to GPIO --- */
#if 0
/* was necessary to include this on the c-side ...
*/
/* PCI_IF */
#define DB_CUSTOMER_BOARD_PCI_IF_NUM 1
#define DB_CUSTOMER_BOARD_PCI_IF dbCustomerBoardPciIf
static MV_BOARD_PCI_IF dbCustomerBoardPciIf[DB_CUSTOMER_BOARD_PCI_IF_NUM] =
/* {pciDevNum, {intAGppPin, intBGppPin, intCGppPin, intDGppPin}}*/
{
{7, {N_A, N_A, N_A, N_A}} /* pciSlot0*/
};
/* MAC config: specify MAC speed and Phy address per ethernet interface*/
#define DB_CUSTOMER_BOARD_MAC_INFO_NUM 1
#define DB_CUSTOMER_BOARD_MAC_INFO dbCustomerBoardMacInfo
static MV_BOARD_MAC_INFO dbCustomerBoardMacInfo[DB_CUSTOMER_BOARD_MAC_INFO_NUM] =
/* {{MV_BOARD_MAC_SPEED boardmacSpeed, MV_U8 boardEthSmiAddr}} */
{
{BOARD_MAC_SPEED_AUTO, 0x8} /* egiga0*/
};
#endif
#else
#error "#### THIS BOARD DEFINITION SHOULD NOT HAVE BEEN LOADED - Please fix me ####"
#endif /* defined(CONFIG_LACIE_5BIG) */
The most scaring part is that the 5big seems to have pci. But I don't know what could be connected. An extra sata chip? Anyway, the code is 'marked away' with the message: "was necessary to include this on the c-side ...". So far I didn't find anything in .c files, though.
I think if you just include sata multipliers in the 2big kernel, if might work. Fortunately taetae has serial access, so it will give a lot of information.
